Cadence SimVision UVM/SystemVerilog debugger

transaction level debug via SimVision....

• transaction waveform info/pin level waveform info 
• transaction database info
• UVM phase sequence info
• assertion info
• coverage rate
• functional
• fsm
• code
• assertion
• performance 
• debug step by step, like gdb forward, backward, stop point, value dump....
• unknown signal trace back
• vif (virtual interface), Driver