BSDL 4 JTAG

BSDL 在做 JTAG Boundary-scan test中, 不可或缺的 file. 裡面會定義好 JTAG 的指令, 跟實際板子上的 pin map, 還有一些 Boundary scan register define. Boundary-Scan Description Language (BSDL) The Boundary-Scan Description Language (BSDL) is a subset of VHDL (VHSIC Hardware Description Language) that describes how boundary-scan (JTAG) is implemented in a device and how it operates. Boundary-scan tools usually require that the user supply BSDL files for the devices being used in order to properly generate test vectors and perform in-system programming and functional testing. Ref from: http://www.corelis.com/support/BSDL.htm BSDL file Format - Entity descriptions - Generic parameter - Logical Port description - Use statements - Pin Mapping(s) - Scan Port identification - Instruction Register description - Register Access description - Boundary Register description

//- Entity descriptions 
    entity S3C2416 is

//- Generic parameter
    generic (PHYSICAL_PIN_MAP: string:= "S3C2416_FBGA");

//- Logical Port  description
    port ( 
          PEXTCLK      : in       bit;
          PFRnB        : in       bit;
          PRDATA       : inout    bit_vector (0 to 15);
          GND0         : linkage  bit;
          PWR31        : linkage  bit;  

//- Use statements
          use STD_1149_1_2001.all;   
          attribute COMPONENT_CONFORMANCE of S3C2416: entity is "STD_1149_1_2001";
   
          attribute PIN_MAP of S3C2416: entity is PHYSICAL_PIN_MAP;

//- Pin Mapping(s)
          constant S3C2416_FBGA: PIN_MAP_STRING := 
            "PEXTCLK      : P15," &
            "PFRnB        : E3," &

//- Scan Port  identification
   attribute TAP_SCAN_CLOCK of PTCK  : signal is (1.000000e+06, BOTH);
   attribute TAP_SCAN_IN    of PTDI  : signal is true;
   attribute TAP_SCAN_MODE  of PTMS  : signal is true;
   attribute TAP_SCAN_OUT   of PTDO  : signal is true;
   attribute TAP_SCAN_RESET of PnTRST: signal is true;

//- Instruction Register description
   attribute INSTRUCTION_OPCODE of S3C2416: entity is 
     "BYPASS  (1111)," &
     "EXTEST  (0000)," &
     "SAMPLE  (0011)," &
     "PRELOAD (0011)," &
     "IDCODE  (1110)";

//- Register  Access descript
   attribute REGISTER_ACCESS of S3C2416: entity is 
        "BYPASS    (BYPASS)," &
        "BOUNDARY  (EXTEST, SAMPLE, PRELOAD)," &
        "DEVICE_ID (IDCODE)";

//- Boundary Register description   
   attribute BOUNDARY_REGISTER of S3C2416: entity is 
--     
--    num   cell   port          function      safe  [ccell  disval  rslt]
--     
     "684  (BC_1,  PnRSTOUT,     output2,      X),                        " &
     "683  (BC_4,  PEINT(8),     observe_only, X),                        " &
     "682  (BC_1,  *,            control,      0),                        " &
     "681  (BC_1,  PEINT(8),     output3,      X,    682,    0,      Z),  " &

Ref: -- The following list specifies the characteristics of each cell in the boundary -- scan register from TDI to TDO. The following is a description of the label -- fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not have a port -- name. -- function: Is the function of the cell as defined by the standard. Is one -- of input, output2, output3, bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be loaded with -- for safe operation when the software might otherwise choose a -- random value. -- ccell : The control cell number. Specifies the control cell that -- drives the output enable for this port. -- disval : Specifies the value that is loaded into the control cell to -- disable the output enable for the corresponding port. -- rslt : Resulting state. Shows the state of the driver when it is -- disabled. Ref: http://boundaryscan.blogspot.com/ http://www.xilinx.com/support/answers/8350.htm