DVFS emulator

DVFS(Dynamic voltage frequency scaling)利用動態的調整"電壓","頻率"的方式達到low power的效果.當然也可以搭配"Power Management"來做到 Power Saving 的功效.原理和方法請參考底下的Refs. Refs: DVFS Voltage Scaling and DVFS 動態電壓與頻率調節在降低功耗中的作用 power management 4 Linux power monitor part1 peak power Constrains : 1.底下假設每個Model都各有不同的Time and Power,且先後順序也已知.

          TsCPUPtr->Set_cTsID(0);
          TsCPUPtr->Set_cTsSeq(0);           //define Seq-list(0)
          TsCPUPtr->Set_cTsStr("CPU_TASK");
          TsCPUPtr->Set_cTs_WORK_1(20,10);  //define Power(20uint w) Time(10uint s)
          TsCPUPtr->Set_cTs_WORK_2(10,20);  //define Power(10uint w) Time(20uint s)
          TsCPUPtr->Set_cTs_WORK_3(5,40);   //define Power(5unit w) Time(40uint s)

          TsDMAPtr->Set_cTsID(1);
          TsDMAPtr->Set_cTsSeq(1);
          TsDMAPtr->Set_cTsStr("DMA_TASK");
          TsDMAPtr->Set_cTs_WORK_1(30,20);
          TsDMAPtr->Set_cTs_WORK_2(15,40);
          TsDMAPtr->Set_cTs_WORK_3(10,60);

2. 假設每組Model都各有3組不同的Work Type.在時間先後順序的constrain下,我們可以找到所有的Solution Spaces...且滿足我們的Time constrain@ (50unit)

   ( CPU_WORK_1_Time + DMA_WORK_1_Time <= Time_Constrain )? Pass : fail     ( CPU_WORK_1_Time + DMA_WORK_2_Time <= Time_Constrain )? Pass : fail     ( CPU_WORK_1_Time + DMA_WORK_3_Time <= Time_Constrain )? Pass : fail     ( CPU_WORK_1_Time + DMA_WORK_1_Time + DMA_WORK_2_Time <= Time_Constrain )? Pass : fail 

3.透過Time constrain的方式可以找到符合假設的解空間.最後再透過Power的比較找出最小的total Power解.

   ( CPU_WORK_1_Time(10) + DMA_WORK_1_Time(20) <= Time_Constrain(50) )? Pass : fail     ( CPU_WORK_1_Power(20) + DMA_WORK_1_Power(30) ) = 50      ( CPU_WORK_1_Time(10) + DMA_WORK_2_Time(40) <= Time_Constrain(50) )? Pass : fail     ( CPU_WORK_1_Power(20) + DMA_WORK_2_Power(15) ) = 35 

Results This Model only support @ CPU to DMA time windos CPU to BUS if you want another time windows, Ref "SetModel_SolSpaceAns()" Power And Time Set , Ref "SetModel_TASKPowerTime()" Timing Sequence Space solutions , Ref "SetModel_WorkSolSpaceWt()" Timing Sequence Space Solutions 4 C(m,n) case 3 2 1 3 2 3 1 2 1 3 2 1 Final Answers Sol CPU @ Time Seq ::1 Sol DMA @ Time Seq ::2 ========================== Sol CPU @ Time Seq ::2 Sol DMA @ Time Seq ::1 ========================== Sol CPU @ Time Seq ::2 Sol DMA @ Time Seq ::2 ========================== Sol CPU @ Time Seq ::5 Sol DMA @ Time Seq ::2 ========================== code download here...